General Description

Each of these Schottky-clamped data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two four-line sections. The 3-STATE outputs can interface directly with data lines of bus-organized systems. With all but one of the common outputs disabled (at a high impedance state), the low impedance of the single enabled output will drive the bus line to a HIGH or LOW logic level.

Features

3-STATE version of DM74LS153 with same pinout

Schottky-diode-clamped transistors

Permit multiplexing from N-lines to one line

Performs parallel-to-serial conversion

Strobe/output control

High fanout totem-pole outputs

Typical propagation delay

Data to output

12 ns

Select to output 21 ns

Typical power dissipation 35 mW